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4 часа назад

Senior Physical Design Engineer (AI)

230 000 - 400 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Senior Physical Design Engineer (AI): Owning physical design from floorplan through signoff for AI accelerator silicon with an accent on synthesis, place and route, clock tree synthesis, timing closure, and ECO implementation. Focus on solving complex timing, congestion, power, and physical implementation challenges while delivering production silicon at advanced process nodes.

Location: Mountain View, California, onsite

Salary: $230,000–$400,000 base salary plus equity

Company

hirify.global is recruiting for a stealth AI infrastructure startup founded by engineers behind Tesla Dojo, Apple Silicon, AMD Zen, and Cerebras. The company is building a new computing platform using wafer-scale architectures and advanced 3D integration to improve AI performance, compute density, power efficiency, and cost.

What you will do

  • Own physical design for AI accelerator silicon from floorplan through signoff.
  • Drive synthesis, place and route, clock tree synthesis, timing closure, and ECO implementation.
  • Collaborate with architecture, RTL, verification, foundry, and EDA teams to deliver production silicon.
  • Solve complex timing, congestion, power, and physical implementation challenges.
  • Use AI-assisted design flows to improve engineering productivity and tapeout execution.
  • Help shape physical implementation methodology for next-generation AI accelerators.

Requirements

  • 8+ years of hands-on physical design experience on advanced ASIC or SoC programs.
  • End-to-end ownership of physical implementation from floorplan through signoff.
  • Strong experience with synthesis, place and route, CTS, timing closure, and physical optimization.
  • Experience delivering production silicon at advanced process nodes of 7nm or below.
  • Expertise with tools such as Cadence Innovus, Synopsys Fusion Compiler, PrimeTime, or Tempus.
  • Track record of solving implementation challenges across architecture, RTL, and physical design teams.

Nice to have

  • GPU, CPU, AI accelerator, or datacenter silicon experience.
  • CoWoS, 2.5D, or 3D packaging experience.
  • IR/EM or signal integrity analysis experience.
  • DFT-aware physical implementation experience.
  • Direct collaboration with foundries and EDA vendors.

Culture & Benefits

  • Work with a small, world-class engineering team.
  • Build cutting-edge AI hardware from first principles.
  • Participate in developing a fundamentally new computing platform.
  • Receive equity in addition to the base salary.

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