1 Π΄Π΅Π½Ρ Π½Π°Π·Π°Π΄
Principal SoC Architect (AI)
300Β 000 - 350Β 000$
ΠΡΡΡ & Π‘ΠΎΠΏΡΠΎΠ²ΠΎΠ΄
ΠΠ»Ρ ΠΌΡΡΡΠ° Ρ ΡΡΠΎΠΉ Π²Π°ΠΊΠ°Π½ΡΠΈΠ΅ΠΉ Π½ΡΠΆΠ΅Π½ Plus
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
Π’Π΅ΠΊΡΡ:
TL;DR
Principal SoC Architect (AI): Leading end-to-end architecture for advanced AI inference chips with an accent on performance, power, cost, and system-level efficiency. Focus on designing memory subsystems, high-speed interconnects, control paths, chiplet integration, silicon bring-up, and cross-functional execution from architecture through production.
Location: Santa Clara County, California, United States
Salary: $300,000β$350,000 per year
Company
Early-stage AI infrastructure startup backed by Tier-1 venture capital firms, developing chips and systems for highly efficient inference workloads.
What you will do
- Lead end-to-end SoC architecture for next-generation AI inference chips.
- Define key SoC blocks, interfaces, and architectural trade-offs across performance, power, area, schedule, and cost.
- Architect PCIe Gen5-or-higher connectivity, scale-up and scale-out interconnects, and UCIe integration.
- Design HBM and LPDDR memory subsystems, including bandwidth modeling and memory controller integration.
- Define CPU complex, boot flows, security, power, reset, and clocking control paths.
- Coordinate with RTL, firmware, validation, packaging, and bring-up teams through silicon debug and performance tuning.
Requirements
- Experience architecting real, shipping SoCs across the full development lifecycle.
- Strong knowledge of SoC blocks and their interfaces, including architecture, RTL, firmware, and bring-up workflows.
- Experience with PCIe Gen5 or higher, scale-up or scale-out interconnects, and UCIe.
- Experience with HBM or LPDDR memory architecture, bandwidth modeling, and memory controller integration.
- Experience designing CPU control paths, boot flows, security, power, reset, and clocking systems.
- Experience with silicon bring-up, debug strategy, and performance optimization.
Nice to have
- Early-stage SoC development experience in a startup environment.
- Chiplet or multi-die SoC experience.
- Experience with AI accelerators, GPUs, or high-bandwidth networking silicon.
Culture & Benefits
- Opportunity to make a substantial impact on a fundamentally new chip and system architecture.
- Work on AI infrastructure innovation at both the chip and system levels.
- Build products from the ground up in an early-stage startup environment.
ΠΡΠ΄ΡΡΠ΅ ΠΎΡΡΠΎΡΠΎΠΆΠ½Ρ: Π΅ΡΠ»ΠΈ ΡΠ°Π±ΠΎΡΠΎΠ΄Π°ΡΠ΅Π»Ρ ΠΏΡΠΎΡΠΈΡ Π²ΠΎΠΉΡΠΈ Π² ΠΈΡ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡ iCloud/Google, ΠΏΡΠΈΡΠ»Π°ΡΡ ΠΊΠΎΠ΄/ΠΏΠ°ΡΠΎΠ»Ρ, Π·Π°ΠΏΡΡΡΠΈΡΡ ΠΊΠΎΠ΄/ΠΠ, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡΠ΅ ΡΡΠΎΠ³ΠΎ - ΡΡΠΎ ΠΌΠΎΡΠ΅Π½Π½ΠΈΠΊΠΈ. ΠΠ±ΡΠ·Π°ΡΠ΅Π»ΡΠ½ΠΎ ΠΆΠΌΠΈΡΠ΅ "ΠΠΎΠΆΠ°Π»ΠΎΠ²Π°ΡΡΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡΠΈΡΠ΅ Π² ΠΏΠΎΠ΄Π΄Π΅ΡΠΆΠΊΡ. ΠΠΎΠ΄ΡΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β
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