Physical Design Engineer

Location: On-site at the Sunnyvale headquarters office, United States

Salary: $150,000–$250,000 annually

Company

hirify.global Systems builds large-scale AI chips and high-speed AI computing platforms for model labs, enterprises, and AI-native startups.

What you will do

• Synthesize, place, and route high-speed designs across the complete physical design flow.
• Perform block-level, subsystem, and full-chip physical implementation and integration.
• Drive timing convergence, constraint drafting, and timing closure across blocks, partitions, and the full chip.
• Optimize designs for power, performance, and area.
• Resolve DRC, LVS, IR, and electromigration issues using ICV or Calibre.
• Collaborate with RTL teams to improve physical design and enhance implementation flows with Tcl and Python.

Requirements

• 10+ years of physical design and physical verification experience.
• Expertise in block and full-chip physical verification, IR/EM analysis, and resolution.
• Strong experience with STA, timing constraints, floor planning, and full-chip integration.
• Proficiency with Design Compiler, Fusion Compiler, ICC2, or similar physical design tools.
• Strong scripting skills in Tcl and Python.
• BS or MS in Electrical Engineering.

Nice to have

• Knowledge of CPU or GPU design.
• Experience with block or partition physical design, physical design verification, or IR analysis.
• Knowledge of the Synopsys tool suite.

Culture & Benefits

• Work on an AI platform designed beyond the constraints of GPUs.
• Opportunity to contribute to and publish cutting-edge AI research.
• Work with one of the fastest AI supercomputers.
• Startup vitality combined with job stability.
• Non-corporate culture focused on individual beliefs, learning, growth, and inclusion.