DFT Design Engineer (Semiconductor)

Location: Hybrid role based at an hirify.global site in Petah-Tikva or Haifa, Israel, combining on-site and off-site work.

Company

hirify.global develops advanced semiconductor products, including wireless connectivity solutions for WiFi and Bluetooth.

What you will do

• Develop RTL logic, simulations, and structural code for DFT features including SCAN, MBIST, and BSCAN.
• Provide DFT timing-closure support and deliver test content for manufacturing.
• Help define DFT architecture and microarchitecture for blocks, subsystems, and SoCs.
• Optimize power, performance, area, timing, test coverage, defect-per-million targets, and test-time efficiency.
• Integrate DFT blocks into functional IP and SoCs, debug failing RTL tests, and support IP integration.
• Collaborate with post-silicon and manufacturing teams to verify silicon features and develop high-volume manufacturing content for ATE.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 4+ years of experience in DFT engineering.
• Strong knowledge of SCAN ATPG and test automation.
• Hands-on experience with RTL design, SystemVerilog, and digital design fundamentals.
• Proficiency with EDA tools, lint tools, timing analysis, and clock-exception handling.
• Strong problem-solving, communication, and cross-functional collaboration skills.

Nice to have

• Experience improving test coverage, test-time efficiency, and overall design quality.
• Commitment to continuous learning in DFT and semiconductor testing.

Culture & Benefits

• Hybrid work model with time split between an assigned hirify.global site and off-site work.
• Opportunity to contribute to advanced wireless connectivity products.
• Cross-functional collaboration with design, verification, post-silicon, and manufacturing teams.