Intel Foundry Overlay Development Engineer (Semiconductor)

TL;DR

hirify.global Foundry Overlay Development Engineer (Semiconductor): Developing and manufacturing advanced semiconductor process technologies with an accent on overlay process development, lithography, and experimental analysis. Focus on troubleshooting overlay mark performance, co-optimizing process flows and mark design, and transferring validated technology into high-volume manufacturing.

Location: Hybrid work in Hillsboro, Oregon, United States, with time split between the assigned hirify.global site and off-site work.

Salary: $155,520–$255,200 USD annual.

Company

hirify.global develops semiconductor technologies, processors, and advanced manufacturing processes.

What you will do

• Lead scientific research supporting innovative semiconductor device architectures and process realization.
• Design, execute, and analyze experiments to meet engineering specifications.
• Develop and optimize advanced-node overlay processes, overlay marks, and integrated process flows.
• Integrate process steps required to manufacture complex microprocessors.
• Ramp technologies to manufacturing volume and transfer processes to manufacturing partners using Copy Exactly methodology.
• Contribute to hirify.globallectual property development and collaborate with cross-functional engineering teams.

Requirements

• Bachelor’s degree with 12+ years, master’s degree with 10+ years, or Ph.D. with 7+ years of experience in a relevant STEM discipline.
• 7+ years of hands-on lithography industry experience.
• Current experience with advanced-node overlay development processes.
• Proven ability to troubleshoot process impacts on overlay mark performance.
• Experience with integrated process development, Design of Experiments, Statistical Process Control, and data analysis.
• Strong communication skills and the ability to work effectively in cross-functional development teams.

Nice to have

• Experience with overlay-driven integrated process change methodologies and overlay equipment development.
• Hands-on experience with ASML EUV and DUV scanner platforms.
• Experience troubleshooting complex advanced-node process and production issues.
• Knowledge of lithography equipment automation, process control systems, factory automation, or manufacturing execution systems.

Culture & Benefits

• Collaborative environment focused on semiconductor innovation and quality.
• Medical plans, wellness programs, recreational activities, and product discounts.
• Paid time off, retirement benefits, stock bonuses, and competitive total compensation.
• Hybrid work model with on-site and off-site work.

Hiring process

• Experienced-hire process with interviews and candidate evaluation based on relevant industry, research, and engineering experience.