Digital Verification Engineer (FEC)

TL;DR

Digital Verification Engineer (FEC): Validating functional blocks and subsystems for Forward Error Correction features in high-speed networking ASICs with an accent on simulation, formal verification, and coverage-driven methods. Focus on developing self-checking testbenches using SystemVerilog and UVM to ensure the reliability of next-generation networking technology.

Location: Ottawa, Canada

Salary: $70,700 - $112,900

Company

hirify.global is a global leader in high-speed networking technology, committed to a people-first culture and innovation in connectivity.

What you will do

• Collaborate with FEC designers, DSP modelers, and systems architects to understand functional requirements.
• Validate architectural functional blocks using simulation, formal, and coverage-driven methods.
• Develop comprehensive verification and functional coverage test plans.
• Create self-checking testbench environments using SystemVerilog, UVM, and C++.
• Monitor regressions, debug failures, and provide regular progress updates.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science.
• Strong programming skills in object-oriented languages, specifically C/C++, SystemVerilog, and UVM.
• Detail-oriented mindset with a commitment to thorough and comprehensive work.
• Strong analytical and problem-solving skills using engineering principles.
• Curiosity and a strong commitment to continuous learning and knowledge sharing.

Culture & Benefits

• Comprehensive benefits package including medical, dental, and vision plans.
• Participation in DCPP (Canada) with company matching.
• Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
• Paid holidays, sick leave, and vacation time.
• Inclusive work environment that values diversity and individual growth.