ASIC Verification Engineer (AI)

TL;DR

ASIC Verification Engineer (UVM/AI): Developing and verifying RTL for high-performance AI and HPC networking SoCs with an accent on UVM environments and complex SoC validation. Focus on implementing verification plans, executing formal verification, and analyzing functional and code coverage.

Location: Remote from Costa Rica (via EOR)

Company

hirify.global delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters.

What you will do

• Develop UVM environments to verify RTL at block, unit, and SoC levels.
• Write and execute tests based on predefined verification plans.
• Instrument testbenches for functional and code coverage, then collect and analyze results.
• Perform formal verification of block-level RTL.
• Contribute to post-silicon verification activities.

Requirements

• 3+ years of post-college experience in ASIC verification.
• 3+ years of experience with scripting languages such as Python, TCL, Perl, or Shell.
• Proven track record of validating complex SoCs with multiple clock and reset domains.
• Strong experience in UVM-based test bench development.
• B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
• English: professional working proficiency is required.

Culture & Benefits

• Competitive compensation package including base salary and performance incentives.
• Equity participation opportunities.
• Flexible work arrangements and paid holidays depending on geographic location.
• Opportunity to work on cutting-edge AI-first silicon and software development.