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2 дня назад

Staff PDK Engineer (LVS/PERC)

Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Malaysia
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Staff PDK Engineer (LVS/PERC): Developing advanced Process Design Kits and electrical rule checks for semiconductor design with an accent on LVS, PERC, and ESD protection verification. Focus on implementing high-quality verification solutions across multiple EDA platforms and optimizing design methodologies for the Angstrom era of compute.

Location: Hybrid (Penang, Malaysia)

Company

hirify.global is a global leader in semiconductor innovation, currently shaping the future of compute and AI through the Angstrom era.

What you will do

  • Develop advanced PDK Electrical Rule Checks in LVS and ESD protection verification solutions.
  • Implement full breadth coverage across multiple EDA platforms, including Cadence Pegasus, Siemens Calibre, and Synopsys ICV.
  • Collaborate with technology specification owners, validation teams, and EDA vendors to ensure production-quality solutions.
  • Drive the adoption of industry-standard methods for internal and external design communities.
  • Develop and implement QA and regression solutions to qualify PDK collaterals.
  • Mentor junior team members to develop overall team competency.

Requirements

  • BS degree with 7+ years, MS with 5+ years, or PhD with 3+ years of experience in Electronics, Electrical, or Computer Engineering.
  • 3+ years of experience in DRC/LVS runset development using Calibre-SVRF, ICV-PXL, or Pegasus.
  • 3+ years of experience in EDA PERC rule deck development or Static ESD verification solutions.
  • Proficiency in scripting using Python, PERL, or TCL.
  • Must be based in or able to work in a hybrid model in Penang, Malaysia.

Nice to have

  • 3+ years of experience developing PDKs for advanced process technologies.
  • Familiarity with IC physical design, layout, and verification flows.
  • Knowledge of IC manufacturing process flows.
  • Experience with DA/CAD/CAE environments involving circuit simulation, parasitic extraction, or current density analysis.

Culture & Benefits

  • Hybrid work model allowing employees to split time between on-site and off-site work.
  • Opportunity to work with industry-leading experts on groundbreaking semiconductor technology.
  • Commitment to ethical hiring practices and RBA compliance.

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