IC Design Engineer (ASIC)

TL;DR

IC Design Engineer (ASIC): Implementing new technologies for consumer electronic devices with an accent on synthesis, timing closure, and physical implementation. Focus on leading complex design flows, developing constraints, and collaborating with RTL and PNR teams to ensure high-quality silicon delivery.

Location: Must be based in Durham, NC, USA

Salary: $143,800 – $230,000

Company

hirify.global is a global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Lead synthesis and timing closure for complex ASIC designs.
• Develop and manage full-chip and block-level constraints.
• Interface with RTL, IP, and library teams to ensure high-quality RTL delivery.
• Develop methodologies for synthesis, static timing analysis (STA), and low-power checks.
• Collaborate with PNR and RTL teams on physical implementation and power-intent requirements.

Requirements

• 10-12+ years of relevant engineering experience depending on degree level.
• Extensive experience with frontend tools including PrimeTime, DC, VCLP, Formality, and LEC.
• Strong proficiency in TCL scripting.
• Proven track record of multiple successful tapeouts.
• Deep knowledge of timing closure and physical implementation flows.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP) and annual equity awards.
• Discretionary annual bonus eligibility.
• Paid holidays, sick leave, and vacation time.