ASIC Package Design Manager (AI)

TL;DR

ASIC Package Design Manager (AI): Leading a team of engineers in designing complex flip-chip-BGA packages for high-performance ASICs with an accent on high-speed SerDes and power delivery. Focus on project management, technical methodology development, and cross-functional collaboration to support AI, networking, and HPC initiatives.

Location: Must work on-site at the San Jose office, 5 days a week.

Salary: $143,800–$230,000

Company

hirify.global is a global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Lead and develop a team of engineers to maximize productivity and technical excellence.
• Manage project plans for 20+ concurrent designs, including scope, schedules, and resource allocation.
• Define technical methodologies and design rules for package development.
• Communicate project status, risks, and next steps to stakeholders.
• Collaborate with customers, vendors, and cross-functional teams to ensure project success.
• Oversee package-level signal and power integrity efforts.

Requirements

• Must be based in or able to work on-site in San Jose, CA.
• BSEE/MSEE or equivalent degree.
• 12+ years of experience in flip-chip-BGA package design, including high-speed SerDes.
• Minimum 3 years of experience in a management role.
• Technical understanding of package-design lifecycles, DFx trade-offs, and layout.
• Ability to cooperate with a worldwide team across multiple time zones.

Culture & Benefits

• Competitive base salary with discretionary annual bonus.
• New hire and annual equity awards.
• Comprehensive benefits including medical, dental, and vision plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
• Paid holidays, sick leave, and vacation time.