Senior CPU Physical Design Engineer (Silicon)

TL;DR

Senior CPU Physical Design Engineer (Silicon): Designing and delivering high-performance CPU blocks from RTL to GDS for future-generation microprocessors with an accent on full physical design flow and timing closure. Focus on optimizing designs for power, performance, and area using industry-standard EDA tools and leading verification to final sign-off.

Location: Hybrid (Israel: Haifa or Petah-Tikva)

Company

A global leader in the design and manufacturing of semiconductor chips and high-performance processors.

What you will do

• Design and deliver high-performance CPU blocks from RTL to GDS, ensuring they are ready for manufacturing.
• Execute the full physical design flow, including synthesis, floorplanning, place and route, and CTS.
• Manage timing closure, power/clock distribution, and reliability, power, and noise analysis.
• Lead verification and sign-off processes including STA, equivalence, and LVS/DRC/ERC checks.
• Optimize designs for power, performance, and area utilizing EDA tools from Cadence, Synopsys, Mentor, and Ansys.
• Mentor junior engineers and contribute to methodology and automation improvements.

Requirements

• B.Sc. or M.Sc. in Electrical or Computer Engineering or an equivalent degree.
• At least 10 years of experience in physical design.
• Expertise in using industry-standard implementation tools from Cadence and Synopsys.

Culture & Benefits

• Eligible for a hybrid work model, allowing a split between on-site and off-site work.
• Opportunity to work on disruptive technology enabling devices from entry PCs to high-end servers.
• Part of the Silicon and Platform Engineering Group, focusing on breakthrough silicon solutions.