DFT Design Engineer (Silicon Design)

TL;DR

DFT Design Engineer (Silicon Design): Designing and verifying robust Design for Test (DFT) features for SoC and functional IP blocks with an accent on manufacturability and reliability. Focus on developing RTL code, implementing SCAN/MBIST architectures, and optimizing logic for power and performance.

Location: Hybrid in Fort Collins, Colorado, US

Salary: $105,650–$149,150 USD

Company

A global leader in silicon innovation, specifically within the Data Center Group focusing on Xeon-based and AI-accelerated systems.

What you will do

• Develop logic design and RTL coding for DFT architectures including SCAN, MBIST, BSCAN, and TAP.
• Define architecture and microarchitecture features for DFT blocks and subsystems.
• Optimize logic to achieve power, performance, area, timing, and test coverage goals.
• Write and generate RTL and structural code for DFT integration.
• Review and execute verification plans to resolve RTL test failures.
• Develop high-volume manufacturing (HVM) test content for production deployment on ATE.

Requirements

• Bachelor's degree in computer or electrical engineering, or a related field.
• 6+ months of experience with design tools, RTL coding, and DFT techniques.
• Must be based in or able to work at the Fort Collins, Colorado site.

Nice to have

• Master's degree in computer engineering or computer science.
• Experience with ATPG, coverage analysis, and EDT setups.
• Proficient programming skills in TCL, Python, Perl, and/or C++.
• Knowledge of GLS for test scenario resolution and ATPG coverage analysis.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health, retirement, and vacation programs.
• Hybrid work model allowing employees to split time between on-site and off-site work.