Director, Process Engineer – Dry Etch (Semiconductor Manufacturing)

Location: Hybrid work model with on-site work at hirify.global sites in Hillsboro, Oregon or Phoenix, Arizona, United States.

Annual salary: $211,400–$298,440 USD

Company

hirify.global Foundry develops and manufactures advanced semiconductor technologies, including process and packaging solutions, for customers worldwide.

What you will do

• Lead dry etch process engineering across advanced CMOS technology development, transfer, optimization, and sustaining.
• Improve process capability, profile control, critical dimension uniformity, selectivity, defectivity, yield, throughput, and cost.
• Define and execute process experiments, analyze metrology and inline data, identify root causes, and implement corrective actions.
• Enable high-volume manufacturing through process transfer, ramp readiness, tool qualification, recipe optimization, and excursion response.
• Resolve tool, chamber matching, hardware, and productivity issues with equipment suppliers.
• Coordinate with technology development, manufacturing, integration, lithography, thin films, cleans, yield, defect metrology, quality, reliability, and supplier teams.

Requirements

• 10+ years of relevant semiconductor industry experience focused on dry etch process development, process integration, or high-volume manufacturing support.
• Master's degree in electrical engineering, chemical engineering, mechanical engineering, materials science, physics, chemistry, or a related technical field.
• Hands-on experience with dry etch process development, plasma etch equipment, recipe optimization, process characterization, and troubleshooting.
• Experience collaborating across process modules, integration, equipment engineering, manufacturing, yield, defect metrology, and external suppliers.
• Ability to work in a dynamic fab environment, handle urgent manufacturing issues, and drive technical closure under schedule pressure.

Nice to have

• Doctoral degree in a related technical field.
• Experience with advanced CMOS, Gate-All-Around technology, advanced patterning, atomic layer etch, conductor or dielectric etch, spacer etch, or hard mask open.
• Experience in semiconductor foundry, logic technology development, or high-volume manufacturing environments.
• Experience with statistical process control, design of experiments, structured problem solving, and metrology or inspection data such as CD-SEM, profile, defect, overlay, electrical test, or yield data.

Culture & Benefits

• In-person collaboration is expected to support rapid decision-making and problem resolution.
• Hybrid work model allowing employees to split time between the assigned hirify.global site and off-site work.
• Competitive pay, bonuses, stock awards, discounted stock purchase opportunities, health and retirement benefits, vacation, wellness programs, and life and disability insurance.
• The role is a Position of Trust and requires passing an extended background investigation.