Sr. ASIC Layout Design Engineer (Analog/Mixed-Signal)

Location: US - Goleta, California. Must be a US citizen or permanent resident.

Salary: $113,600–$151,400 per year

Company

hirify.global develops high-reliability sensing and imaging technologies for industrial, aerospace, defense, environmental, scientific, and medical applications.

What you will do

• Develop analog and mixed-signal IC layouts and create completed design GDS databases using Cadence and Siemens tools.
• Optimize floor planning, placement, and routing in collaboration with analog and digital circuit designers.
• Run and troubleshoot DRC, LVS, and PEX verification while applying foundry rules and PDK requirements.
• Collaborate with ROIC, detector, systems, processor, test, and packaging engineers to improve performance, manufacturability, and yield.
• Prepare project updates, design review reports, and customer presentations.
• Maintain design documentation and handle export-controlled information in accordance with applicable protocols and quality systems.

Requirements

• Bachelor’s degree in engineering or a related field and 10+ years of industry experience.
• Expertise in analog and mixed-signal CMOS layout, ideally with 180 nm, 130 nm, or 75 nm process nodes.
• Proficiency with Cadence Virtuoso XL and connectivity-aware design.
• Strong knowledge of Calibre DRC/LVS verification, custom cell-based layout, and top-level floor planning.
• Technical understanding of wire resistance, coupling capacitance, and parasitic reduction techniques.
• US citizenship or permanent residency required.

Nice to have

• Experience with focal-plane array layouts.
• Programming or scripting skills in SKILL, TCL, Shell, or Python.

Culture & Benefits

• Work in a multidisciplinary engineering environment focused on high-performance sensing and imaging technology.
• Support projects serving scientific research, security, firefighting, government, and industrial applications.
• Operate within formal ISO quality, export-control, and regulatory compliance processes.