Lead Custom Layout Design Engineer (Analog IC)

TL;DR

Lead Custom Layout Design Engineer (Analog IC): Designing and optimizing custom layout floorplans and routing for high-speed mixed-signal PHYs with an accent on signal integrity and noise reduction. Focus on top-level hierarchy floorplanning, EMIR analysis, and collaborating with analog circuit design teams to ensure high-quality IC layout.

Location: Nanjing

Company

hirify.global is a global leader in electronic design automation (EDA) software and hardware tools.

What you will do

• Execute custom layout floorplanning, matching guides, and resistor/capacitor placement.
• Develop top-level hierarchy floorplans for blocks and power distribution.
• Design high-speed mixed-signal PHY layouts, including SerDes, USB, and DDR.
• Reduce coupling and noise through strategic sensitive and mixed-signal routing.
• Collaborate with the analog circuit design team to ensure high efficiency and quality of layouts.

Requirements

• BSEE degree with 4+ years of experience in analog/custom layout of advanced technology nodes.
• Proficiency with layout edit and verify tools such as Virtuoso XL and Pegasus/Calibre DRC/LVS.
• Experience with EMIR tools like Voltus-FI and conducting DRC/LVS/ERC analysis.
• Fundamental understanding of IC design technology and process methodologies.
• Good communication skills in English.
• Must be based in or able to work in Nanjing.

Nice to have

• Experience with PERC runs.
• Work experience in FinFET layout.
• Knowledge of ESD/Latch-up.
• Experience collaborating with digital P&R teams.