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2 дня назад

Sr. Staff Engineer, Hardware Design, Test Ops (Semiconductor)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Taiwan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Sr. Staff Engineer, Hardware Design, Test Ops (Semiconductor): Designing and reviewing MLO and PCB probe cards for high-speed wafer sort hardware with an accent on signal and power integrity. Focus on optimizing PAM4/NRZ channels, defining high-speed design guidelines, and utilizing advanced simulation tools for complex chip architectures.

Location: Hsinchu City, Taiwan

Company

hirify.global is a semiconductor solutions provider creating essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

  • Design and review MLO (multi-layer organic) and PCB layouts for probe cards across various groups.
  • Ensure high-speed signal and power integrity for increasingly complex chip designs.
  • Utilize industry-standard simulation tools such as Keysight ADS, Cadence Sigrity, and Ansys HFSS.
  • Define and review design guidelines for high-speed channels, including stack-up and routing topology.
  • Collaborate within the Central Engineering group to provide reliable hardware for wafer sort.

Requirements

  • Bachelor's degree in Electrical Engineering or related field with 9+ years of experience (Master's 6+ years, PhD 4+ years).
  • 5+ years of experience designing high-speed and high-density PCBs or MLOs containing serial and memory interfaces.
  • 3+ years of experience in signal integrity (SI) and power integrity (PI) simulation.
  • Proficiency with simulation tools like Keysight ADS, Cadence Sigrity, or Ansys HFSS.
  • Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Nice to have

  • Strong knowledge of PCIe, DDR3/4, and NAND memory topologies.
  • Familiarity with ATE platforms including Advantest V93000 or Teradyne UltraFLEX.
  • Prior experience in semiconductor ATE test hardware, probe card design, or high-speed SerDes development.

Culture & Benefits

  • Competitive compensation and comprehensive benefits packages.
  • Work environment based on shared collaboration, transparency, and inclusivity.
  • Access to tools and resources dedicated to professional growth and development.

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