DFT Engineer (Hardware)

TL;DR

DFT Engineer (Hardware): Performing initial test planning, inserting memory BIST and scan, and delivering test patterns for mixed-signal SoCs with an accent on coverage improvement and silicon bringup. Focus on implementing DFT features, generating ATPG patterns, and verifying designs through gate-level simulations.

Location: Must be based in Austin, TX, Chandler, AZ, or Greensboro, NC (Hybrid role).

Company

A leader in mixed-signal processing solutions for consumer electronics and mobile audio markets.

What you will do

• Define, implement, and review DFT features within a collaborative team.
• Generate, insert, and verify Memory BIST logic.
• Perform scan insertion and ATPG pattern generation.
• Develop and review DFT timing and equivalence checking constraints.
• Conduct MBIST and ATPG pattern verification using gate-level simulations.
• Support silicon bringup on ATE and identify test coverage gaps.

Requirements

• Must be a US person or able to access technical data without an export license (sponsorship not available).
• BS or MSEE degree with relevant industry experience.
• Strong hands-on working knowledge of ASIC DFT design and verification.
• Proficiency in industry-standard EDA tools such as FastScan, TestKompress, TetraMAX, or Test Compiler.
• Ability to work onsite in a hybrid capacity in Austin, Chandler, or Greensboro.

Nice to have

• Experience with Verilog, SystemVerilog, or VHDL.
• Knowledge of scripting languages like Perl, Python, or TCL.
• Understanding of low-power test techniques and architectures.
• Experience with synthesis, static timing analysis, and silicon debugging.

Culture & Benefits

• Award-winning culture focused on inclusion, fairness, and community engagement.
• Opportunity to work on industry-leading mixed-signal SoCs for top consumer brands.
• Collaborative environment supporting professional growth and career development.