Silicon Packaging Design Engineer

TL;DR

Silicon Packaging Design Engineer: Managing the end-to-end development process of advanced substrate designs from concept to tapeout with an accent on design performance, cost efficiency, and manufacturability. Focus on driving physical layout and routing, defining design rules, and collaborating with cross-functional teams to optimize silicon-package-board interactions.

Location: On-site in Phoenix, AZ or Hillsboro, OR. This position is not eligible for hirify.global immigration sponsorship.

Salary: $105,650–$172,860 USD

Company

hirify.global is a global leader in semiconductor manufacturing and technology innovation, driving advancements in computing and AI.

What you will do

• Drive physical layout and routing of package designs to meet performance requirements.
• Conduct substrate fit and routing studies to evaluate design, performance, and cost tradeoffs.
• Define and implement substrate design rules while conducting quality reviews.
• Analyze data, resolve Design Rule Checks (DRCs), and optimize for manufacturability.
• Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
• Manage documentation and collateral within the product lifecycle management system.

Requirements

• Bachelor's or Master's degree in Electrical or Mechanical Engineering.
• Minimum 1 year of relevant industry or academic experience.
• Proficiency in package design tools such as Siemens Xpedition, Cadence Allegro, AutoCAD, or SolidWorks.
• Experience with physical layout aspects including custom layouts, floor plans, or schematic conversions.
• Knowledge of microelectronic package or PCB physical layout design and manufacturing processes.
• Must be authorized to work in the US without hirify.global immigration sponsorship.

Nice to have

• Experience in microelectronic package substrate design or package I/O routing.
• Familiarity with electrical modeling and simulation tools like PowerDC, HyperLynx, Q3D, or HFSS.
• Scripting experience using Python, VB, or C.

Culture & Benefits

• Competitive total compensation package including pay and stock bonuses.
• Comprehensive health and retirement benefit programs.
• Paid vacation and time-off policies.
• Opportunity to work on cutting-edge semiconductor and packaging technology.