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4 дня назад

Hardware & Silicon Validation Senior Staff Engineer (PCIe/Ethernet)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
c1
Страна
Taiwan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Hardware & Silicon Validation Senior Staff Engineer (PCIe/Ethernet): Performing analog validations on amplifiers and silicon photonics to deliver high bandwidth over long distances with an accent on PCIe/Ethernet PHY validation and post-silicon bring-up. Focus on high-speed signal analysis, debugging PHY protocol issues, and optimizing SERDES characterization.

Location: Hsinchu, Taiwan (Onsite)

Company

hirify.global provides semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

  • Manage complete responsibility for PCIe/Ethernet PHY validation in post-silicon environments.
  • Execute lab-based silicon bring-up and unit tests for Physical & PCS layer hardware and firmware.
  • Perform high-speed signal validation (Eye diagram, Jitter, BER) using advanced test equipment.
  • Troubleshoot failing tests using oscilloscopes, BERTs, and protocol analyzers.
  • Collaborate with cross-functional teams and external vendors to resolve post-silicon and customer issues.

Requirements

  • BS in Electrical Engineering with 8-10 years or MS with 6-8 years of relevant experience in Pre/Post-Silicon Validation.
  • Strong understanding of high-speed SERDES, equalization techniques, and PCIe protocols.
  • Hands-on experience with SERDES characterization equipment (Scope, BERT, Network analyzer).
  • Proficiency in validation-automation and data analysis using scripting languages like Python or Matlab.
  • English: Excellent written and oral communication skills required.
  • Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Nice to have

  • Working knowledge of SAS/SATA SERDES.
  • Extensive knowledge of PIPE I/F, PCS, and MAC layers of high-speed interfaces.
  • Ability to read board schematics and board layout.
  • Knowledge of SERDES modeling techniques.

Culture & Benefits

  • Competitive compensation and comprehensive benefits package.
  • Work environment focused on shared collaboration, transparency, and inclusivity.
  • Access to tools and resources for professional growth and development.

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