Senior Staff Analog Circuit Design Engineer (SerDes)

TL;DR

Senior Staff Analog Circuit Design Engineer (SerDes): Designing and validating high-performance SerDes technologies for mixed-signal designs with an accent on reliability, functionality, and performance. Focus on implementing functional validation plans, conducting root cause analysis of mixed-signal failures, and developing post-silicon validation frameworks.

Location: Must be based in the greater metropolitan area of Toronto, Ontario. Currently virtual, transitioning to a hybrid model (minimum 4 days on-site) once the local office is operational.

Salary: CAD 182,580.00-257,760.00

Company

hirify.global is a global leader in semiconductor innovation, focusing on scalable engineering solutions, IP development, and foundry enablement.

What you will do

• Design, develop, and implement comprehensive functional validation plans for industry-leading SerDes IP.
• Create and enhance validation frameworks and partner with cross-functional teams for design optimization and troubleshooting.
• Conduct thorough root cause analysis and systematic debugging of mixed-signal design failures.
• Build and maintain post-silicon validation workflows and technical status reports.
• Partner with architecture, design, verification, and manufacturing teams to optimize debugging processes.
• Generate detailed validation reports documenting testing activities and improvement recommendations.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• Must live and work from Canada, specifically within the greater metropolitan area of Toronto, Ontario.
• 3+ years of relevant experience, including 2+ years in SerDes post-silicon validation and debug processes.
• Proficiency in I/O principles and mixed-signal testing approaches.
• Experience in test planning and validation strategy formulation.

Nice to have

• Post Graduate Degree in Electrical Engineering or Computer Engineering.
• Experience with electrical validation and debugging of 224G+ SerDes IP.
• Experience developing validation infrastructure and specialized testing tools.
• Programming experience with Python, C, and C++.

Culture & Benefits

• Current fully home-based arrangement transitioning to a hybrid model.
• Opportunity to influence product quality and shape next-generation hardware platforms.
• Commitment to a culture of accessibility and inclusivity.
• Work within a dynamic engineering organization driving technological breakthroughs.