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5 часов назад

LTD Process Development Integration Engineer (Semiconductors)

85 200 - 162 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
junior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

LTD Process Development Integration Engineer (Semiconductors): Developing and optimizing semiconductor manufacturing processes to scale advanced silicon technologies with an accent on process control and statistical analysis. Focus on root cause analysis of fab quality events, reducing process variation, and optimizing product yield.

Location: On-site in Hillsboro, Oregon, US

Salary: $85,200 – $162,500 USD

Company

hirify.global is a global leader in computing technology, focusing on semiconductor manufacturing and advanced silicon processes to advance Moore's Law.

What you will do

  • Lead Quality Event Form (QEF) responses and Disposition/Material Review Board (XRB) actions.
  • Perform fab and E-test parameter trending and statistical analysis using ANOVA to identify corrective action plans.
  • Monitor Yield Cliffs and Product Performance Indicators to optimize performance.
  • Conduct data-driven root cause analyses of fab quality events and implement preventative solutions.
  • Drive process variation reduction through applied statistics and semiconductor process knowledge.
  • Develop and implement process targeting strategies to optimize product yield.

Requirements

  • Bachelor’s degree in Electrical Engineering, Physics, Material Science, Computer Science, Chemical, Mechanical, Nuclear Engineering, Optics, or Chemistry.
  • 1+ years of prior semiconductor industry experience.
  • 6+ months of experience with statistical data analysis tools including JMP, Excel, or MATLAB.
  • 6+ months of experience with root cause analysis and corrective action planning (CAPA).
  • This position is not eligible for hirify.global immigration sponsorship.
  • Required shift: Compressed work week (CWW) working Thursday, Friday, Saturday, and every other Wednesday from 7 am to 7 pm.

Nice to have

  • Experience with lithography, etching, chemical and mechanical polishing (CMP).
  • Knowledge of transistor device physics and experimental design principles.
  • Familiarity with materials characterization techniques such as SEM, TEM, and metrology.
  • Research experience in STEM fields, particularly semiconductor device architectures.

Culture & Benefits

  • Total compensation package including competitive pay and stock bonuses.
  • Comprehensive benefit programs covering health, retirement, and vacation.
  • Opportunity to work at the forefront of the AI era in semiconductor manufacturing.

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