Назад
Company hidden
1 час Π½Π°Π·Π°Π΄

Senior Mixed Signal IP Enablement and Debug Engineer (IO PHY)

141Β 910 - 269Β 100$
Π€ΠΎΡ€ΠΌΠ°Ρ‚ Ρ€Π°Π±ΠΎΡ‚Ρ‹
hybrid
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
senior
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
US
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify RU Global, списка ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ с восточно-СвропСйскими корнями
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

ВСкст:
/

TL;DR

Senior Mixed Signal IP Enablement and Debug Engineer (IO PHY): Developing and validating high-performance Mixed Signal IPs for Server, Client, and Networking SoCs with an accent on IP integration and post-silicon debug. Focus on solving complex silicon issues, performing root cause analysis, and optimizing signal and power integrity.

Location: Hybrid (Folsom, CA or Santa Clara, CA)

Salary: $141,910–$269,100 USD

Company

A global leader in semiconductor manufacturing, developing industry-leading IP for high-performance computing and foundry customers.

What you will do

  • Partner with SoC customers and IP design teams to deliver comprehensive pre-silicon to post-silicon IP integration and debug support.
  • Develop and execute test plans and content using AI-driven tools and Python/System Verilog scripting.
  • Lead the identification, investigation, and resolution of IP-related silicon issues during the bring-up process.
  • Perform signal integrity and power integrity simulations to optimize design performance.
  • Conduct pre- and post-silicon root cause analysis through comprehensive failure analysis.

Requirements

  • Bachelor's with 5+ years of experience or Master's with 3+ years of experience in Computer or Electrical Engineering.
  • Experience in IP Integration and post-silicon validation/debug with serial IOs (PCIe, USB, Ethernet) or parallel IOs (DDR, LPDDR, UCIe).
  • 2+ years of experience with lab hardware: Oscilloscopes, Logic Analyzers, Protocol analyzers, and BERTs.
  • Proficiency in at least one industry standard IO specification (PHY or Controller).
  • Must be based in the US (California) for hybrid work.

Nice to have

  • Ph.D. degree in Computer or Electrical Engineering.
  • Experience in signal integrity, power delivery, and IBIS-AMI model development.
  • Pre-silicon design or simulation experience in logic, circuits, firmware, or MRC.

Culture & Benefits

  • Total compensation package including competitive pay and stock bonuses.
  • Comprehensive benefit programs covering health, retirement, and vacation.
  • Hybrid work model allowing a split between on-site and off-site work.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’