Senior SoC Compute & Memory Subsystem Architect

TL;DR

Senior SoC Compute & Memory Subsystem Architect: Defining and driving the architecture of compute complexes and high-performance memory subsystems for next-generation IPU/DPU platforms with an accent on cache hierarchies, coherency models, and system-level integration. Focus on optimizing performance, scalability, and power efficiency for hyperscale data center and AI workloads.

Location: Must be based in or able to work on-site in Leixlip, Ireland (Hybrid model)

Salary: €75,200 – €139,700

Company

hirify.global is a global leader in semiconductor technology, building scalable engineering solutions for data centers, cloud infrastructure, and AI.

What you will do

• Define multi-level cache hierarchies and coherency models for compute cores and accelerators.
• Architect system memory subsystems including DDR/LPDDR interfaces and scheduling policies.
• Design SMMU/IOMMU architectures to support virtualization-heavy IPU workloads.
• Optimize data movement and integration between compute, network, and storage subsystems.
• Develop strategies for power efficiency, DVFS scalability, and performance-per-watt.
• Lead long-term architectural roadmaps for compute and memory evolution across product generations.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related STEM field.
• 10+ years of experience in SoC, CPU, or memory subsystem architecture.
• Deep expertise in CPU architecture, cache hierarchies, and coherent/non-coherent interconnects.
• Proven track record in system-level performance and PPA tradeoff analysis.
• Experience driving architecture definition from concept to silicon.
• Must be eligible to work on-site in Leixlip, Ireland.

Nice to have

• Post-graduate degree in a relevant STEM field.
• Experience with ARM and x86 compute architectures, including NUMA and large-scale platforms.
• Background in IPU/SmartNIC or accelerator-centric SoCs for hyperscale environments.
• Familiarity with PCIe, CXL, and high-performance IO memory semantics.

Culture & Benefits

• Competitive total compensation package including base salary and additional components.
• Hybrid work model allowing flexibility between on-site and off-site work.
• Comprehensive benefits package supporting employees and families through all life stages.
• Opportunity to work on cutting-edge networking silicon and hyperscale infrastructure.