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Senior IP Project Engineer (Semiconductors)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Senior IP Project Engineer (Semiconductors): Driving end-to-end execution and delivery of complex IP and subsystem development for automotive and IoT SoCs with an accent on cross-functional coordination and milestone management. Focus on identifying risks, resolving integration dependencies, and ensuring high-quality release readiness across multidisciplinary engineering teams.

Location: Must be based in Austin, Texas (Onsite)

Company

hirify.global is a global leader in secure connectivity solutions for embedded applications, specializing in automotive, industrial, and IoT markets.

What you will do

  • Own end-to-end execution and delivery of IP and subsystem milestones from architecture through release.
  • Coordinate execution across architecture, design, verification, validation, software, and SoC integration teams.
  • Define development phases, schedules, milestones, and quality expectations.
  • Identify risks early, drive resolution, and escalate critical issues threatening execution or quality.
  • Lead technical reviews and execution checkpoints with clear status and follow-through.
  • Improve execution visibility through data collection, milestone tracking, and engineering metrics.

Requirements

  • BSEE required; MSEE preferred with 7+ years of industry-related experience.
  • Strong understanding of the semiconductor development lifecycle, design, and verification methods.
  • Proven experience driving execution across multidisciplinary teams with ownership of plans and schedules.
  • Hands-on proficiency with Microsoft Project, Jira, Confluence, Power BI, and Excel.
  • Excellent leadership, negotiation, and communication skills.
  • Ability to work effectively with global teams.

Nice to have

  • Experience with protocols like AHB/AMBA, Memory (ROM, RAM, Flash, LPDDR/DDR3/4), and memory controllers.
  • Experience in RTL design flow from specification to verification, timing analysis, DFT, and implementation.
  • Understanding of chip assembly, IP integration, and RTL signoff tools (CDC/RDC/Lint/Synthesis).

Culture & Benefits

  • Work within a central design organization (ACE) supporting diverse business lines.
  • Opportunity to contribute to industry-leading automotive and industrial safety standards.
  • Equal Opportunity Employer committed to diversity and inclusion.
  • Support for reasonable accommodations for qualified disabled individuals.

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