CPU Memory Design Engineer

TL;DR

CPU Memory Design Engineer (Embedded Systems): Designing and developing full-custom and compiler-based SRAMs, ROMs, and caches for high-performance hirify.global CPUs and SOCs with an accent on circuit innovation and PPA optimization. Focus on solving complex power, performance, and area constraints using advanced CMOS process technologies.

Location: Must be based in Austin, Texas (Hybrid)

Salary: $122,440–$232,190 USD

Company

hirify.global is a global leader in semiconductor technology, driving business strategy and product development for PC platforms and computing experiences.

What you will do

• Design and develop full-custom and compiler-based SRAMs, ROMs, and multi-ported register files.
• Perform critical path simulations and design custom blocks to meet stringent PPA constraints.
• Execute memory path-finding activities and optimize power, performance, and area.
• Develop memory bit-cell and complex periphery IC designs using automation tools.
• Partner with domain experts to deliver high-quality memory technology collaterals.
• Define design methodologies and manage project execution schedules.

Requirements

• Bachelor's degree in Electrical or Computer Engineering with 4+ years of experience, or Master's with 3+ years, or PhD.
• Proficiency in CMOS circuit design and digital logic optimizations.
• Expertise in VLSI circuits and design methodologies.
• Strong analytical and problem-solving skills.
• Ability to work in a fast-paced, dynamic environment.

Nice to have

• Experience in low-power implementation techniques.
• Familiarity with circuit and layout trade-offs.
• Knowledge of EBB design tools and signal integrity analysis.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health and retirement benefit programs.
• Hybrid work model allowing flexibility between on-site and off-site work.
• Opportunities to work at the forefront of CPU design innovation.