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CPU Memory Design Engineer (CMOS)

122 440 - 232 190$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Текст:
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TL;DR
CPU Memory Design Engineer (CMOS): Designing and developing full-custom and compiler-based SRAMs, register files, ROMs, custom memories, digital circuits, and caches for Intel CPUs and SoCs with an accent on high-performance, high-density, and low-power embedded memory designs. Focus on memory circuit characterization, critical-path simulation, bit-cell and periphery IC design, PPA optimization, and advanced CMOS process technologies.

Location: Austin, Texas, United States; hybrid work model with time split between the assigned hirify.global site and off-site work

Annual salary: $122,440–$232,190 USD

Company

hirify.global develops CPU products and platforms for PCs and other computing form factors through its Client Computing Group.

What you will do

  • Design, develop, and build full-custom and compiler-based SRAMs, ROMs, custom memories, digital circuits, caches, and large signal arrays for hirify.global CPUs and SoCs.
  • Perform memory circuit design, technical readiness activities, characterization, and simulations.
  • Design cache critical paths and custom blocks within strict power, performance, and area constraints.
  • Drive memory path-finding, PPA optimization, bit-cell and complex periphery IC design, and automation.
  • Develop memory arrays and IP, introduce circuit innovations, define methodologies, and execute project schedules.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field with 4+ years of experience, or a master’s degree with 3+ years of experience; PhD holders are also considered.
  • Proficiency in CMOS circuit design, digital logic optimization, and power, performance, and area trade-offs.
  • Expertise in VLSI circuits and design methodologies.
  • Strong analytical and problem-solving skills, with the ability to prioritize work in a dynamic environment.
  • Ability to work in a hybrid model from the assigned hirify.global site in Austin, Texas.

Nice to have

  • Experience with low-power implementation techniques and memory design.
  • Familiarity with circuit and layout trade-offs for optimized designs.
  • Knowledge of EBB design tools, flows, methodologies, and signal integrity analysis.

Culture & Benefits

  • Fast-paced, dynamic CPU design environment focused on high-performance and low-power circuits.
  • Collaboration with domain experts across technology development.
  • Competitive pay, stock bonuses, health benefits, retirement programs, and vacation.
  • Work model combining on-site and off-site work.

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