DFT Application Engineer (Semiconductor)

TL;DR

DFT Application Engineer (Semiconductor): Providing technical support for hirify.global Foundry Services customers on PDKs, DFT/DFM insertion, and ATPG validation methodologies with an accent on aerospace, defense, and government applications. Focus on driving quality improvements in ASIC DFT/DFM flows, collaborating with internal design teams and external stakeholders, and ensuring successful tape-outs for complex multi-die designs.

Location: Must be based in the US (Phoenix, AZ; Santa Clara, CA; or Hillsboro, OR). This role follows a hybrid work model.

Salary: $122,440–$232,190 USD

Company

hirify.global is a global leader in semiconductor technology, delivering cutting-edge silicon process and packaging solutions for the AI era.

What you will do

• Provide comprehensive technical support for DFT tools, flows, and methodologies to ensure successful customer tape-outs.
• Collaborate with internal design teams, IP providers, and EDA vendors to resolve complex technical challenges.
• Drive quality improvements in ASIC DFT/DFM and ATPG validation methodologies for block and SoC-level implementations.
• Develop application notes, best practice guidelines, and technical training materials for internal and customer teams.
• Optimize DFT insertion flows for advanced CMOS processes and multi-die designs.
• Support knowledge transfer and capability building across customer organizations.

Requirements

• US Citizenship required due to the nature of the work.
• Ability to obtain US Government Security Clearance.
• Bachelor's degree in Electrical Engineering, Computer Engineering, or a STEM-related field.
• 3+ years of experience with advanced CMOS processes (22nm and below).
• 3+ years of experience in ASIC DFT/DFM insertion (MBIST, LBIST, SCAN, JTAG) and ATPG validation.
• 2+ years of experience with scripting languages such as Python, Perl, or Tcl.

Nice to have

• Active US Government Security Clearance (Secret Level or higher).
• Post-graduate degree in Electrical/Computer Engineering or STEM-related field.
• Experience with state-of-the-art process technology (7nm and below).
• Customer-facing experience in technical roles.

Culture & Benefits

• Competitive total compensation package including pay, stock bonuses, and comprehensive benefits.
• Access to industry-leading foundry technologies and EDA tool suites.
• Professional development opportunities in DFT methodologies.
• Hybrid work environment balancing on-site collaboration and flexibility.
• Direct impact on national security through advanced semiconductor solutions.