Senior CPU RTL Design Engineer (x86)

TL;DR

Senior CPU RTL Design Engineer (x86): Designing and optimizing high-performance microprocessors with an accent on RTL implementation for integer, floating point, and reservation station logic. Focus on driving microarchitecture definitions, ensuring power/performance/area goals, and providing technical leadership to deliver world-class CPU IP blocks.

Location: On-site in Austin, TX or Hillsboro, OR

Salary: $164,470–$311,890 USD

Company

hirify.global is a global leader in technology, driving innovations in AI, cloud-to-edge computing, and high-performance microprocessor design.

What you will do

• Develop and implement RTL code for CPU functional units and cell libraries.
• Participate in the definition of CPU architecture and microarchitecture features.
• Optimize logic designs to meet strict power, performance, area, and timing requirements.
• Review verification plans and resolve RTL test failures to ensure design integrity.
• Provide technical leadership and guidance to design teams to improve methodology and quality.
• Collaborate across architecture and backend teams to deliver best-in-class products.

Requirements

• Bachelor's degree with 12+ years, Master's with 10+ years, or PhD with 6+ years of relevant experience.
• 6+ years of experience in silicon development, CPU microarchitecture, and logic design.
• 5+ years of experience in technical leadership for IP projects.
• 6+ years of experience with Timing Closure, Power Convergence, and OOO execution design.
• Must be able to work on-site in the United States.

Nice to have

• Experience with x86 CPU microarchitecture.
• Experience driving front-end methodologies and automation/AI tools.

Culture & Benefits

• Competitive total compensation package including pay and stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Opportunity to work on foundational technology powering global devices.
• Collaborative environment focused on innovation and technical excellence.