ASIC Verification Engineer (Embedded)

TL;DR

ASIC Verification Engineer (SystemVerilog/UVM): Designing and verifying complex strategic IPs for NAND-based storage applications with an accent on RTL development and SOC integration. Focus on implementing advanced verification methodologies, solving complex debugging challenges, and optimizing ASIC flows.

Location: Kfar Saba or Omer, Israel

Company

Global leader in Flash and advanced memory technologies, providing critical storage solutions for consumer, automotive, and enterprise markets.

What you will do

• Define, design, verify, and document RTL development in Verilog/System Verilog for worldwide strategic IPs.
• Collaborate closely with architecture teams and various SOC teams across the organization.
• Develop and implement advanced ASIC methodology stages.
• Contribute to the verification of complex IPs and the optimization of development flows.
• Support the growth of a vast, expanding global engineering team.

Requirements

• BSc in Electrical Engineering.
• At least 10 years of experience in ASIC Verification with UVM Methodology and System Verilog.
• Excellent analytical and debugging skills.
• Advanced verbal and written communication skills.
• Strong professional leading skills.

Culture & Benefits

• Inclusive environment that values diversity and a sense of belonging.
• Opportunities to work within a global company at the forefront of memory innovation.
• Commitment to accessibility and equal opportunity for all applicants.