обновлено 10 дней назад
Senior ASIC AMS Verification Engineer (m/f/d) - A OT AESS
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
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Для мэтча с этой вакансией нужен Plus
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TL;DR
Senior ASIC AMS Verification Engineer (m/f/d) - A OT AESS (ASIC analog/mixed-signal verification): Creating models, test benches, and self-checking tests for complex automotive ASICs with an accent on Verilog, Verilog-A, SystemVerilog, and stringent automotive requirements. Focus on developing mixed-signal verification strategies, automating verification infrastructure, mentoring engineers, and validating ASICs post-silicon in the lab.
Location: Timișoara, Romania
Company
develops and produces hardware, software, and services for the future of mobility. Its Advanced Electronics & Semiconductor Solutions organization develops and manufactures semiconductors in a fabless model for strategic internal semiconductor demands.
What you will do
- Develop mixed-signal verification strategies, test benches, and verification environments for complex ASICs.
- Create analog-block models and build block- and system-level environments using Verilog, Verilog-A, and SystemVerilog.
- Develop verification automation utilities, test-bench automation, and infrastructure enhancements.
- Define, develop, and execute self-checking tests based on functional and applicable standards requirements.
- Support verification test plans, verification activities, and post-silicon ASIC validation in the lab through tests and scripts.
- Mentor the team and provide technical support for modeling and verification activities.
Requirements
- Master of Science or PhD in Electrical Engineering, Microelectronics, Physics, or a similar field.
- 5+ years of relevant verification experience in analog mixed-signal circuits.
- Understanding of analog circuit design.
- Excellent programming skills in Verilog, SystemVerilog, VerilogAMS, and Verilog-A.
- Experience developing SystemVerilog test benches for mixed-signal block verification.
- Familiarity with chip-level verification best practices, languages, and interface elements for mixed-signal simulation.
- Experience with CAD tools, ideally the Cadence AMS Simulation environment.
- Very good written and spoken English.
- Planning and organizing skills, initiative, effective communication, and eagerness to grow and develop.
Nice to have
- Experience with script programming using Perl, Python, Makefile, or Shell.
Culture & Benefits
- Work on innovative automotive applications and semiconductor solutions for the future of mobility.
- Join a culture centered on ownership, personal growth, skills development, and impact.
- Contribute to a fabless semiconductor organization serving strategic internal demands.
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