CPU Formal Verification Engineer (Semiconductors)

TL;DR

CPU Formal Verification Engineer (Semiconductors): Ensuring the reliability and functionality of IP and SoC microarchitectures using advanced formal verification tools and methodologies with an accent on model checking and equivalence checking algorithms. Focus on developing formal proofs, creating abstraction models, and collaborating with RTL developers to verify complex architectural features.

Location: Hybrid; must be based in or be able to work at hirify.global sites in Hillsboro (OR), Folsom (CA), Santa Clara (CA), Austin (TX), or Phoenix (AZ)

Salary: $105,650.00 - $149,150.00

Company

hirify.global is a global leader in the semiconductor industry, designing and manufacturing silicon products that empower digital lives.

What you will do

• Conduct formal verification of IP and SoC microarchitectures using model checking and equivalence checking algorithms.
• Develop comprehensive formal verification test and coverage plans, defining scope and strategy.
• Create abstraction models to achieve convergence on design and apply effective abstraction techniques.
• Develop formal proofs to implement verification plans and resolve failing tests.
• Collaborate with architects, RTL developers, and physical design teams to verify complex architectural features.
• Maintain and improve functional verification infrastructure for future scalability.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 1+ years of experience in formal verification.
• Proficiency in formal verification tools (Jasper) and methodologies.
• Strong grasp of abstraction techniques, convergence methodologies, and simulation techniques.
• Knowledge of binary decision diagrams (BDD) and data flow graphs (DFG) for data path analysis.
• Must be based in or be able to work from specified US locations.

Nice to have

• Master's degree in a relevant technical field.
• Experience collaborating with cross-functional teams including architects and physical design engineers.
• Deep understanding of complex architectural protocols in modern microarchitectures.

Culture & Benefits

• Competitive total compensation package including pay and stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to work on cutting-edge silicon products in a world-leading semiconductor company.