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2 дня назад

Design Verification Engineer (Hardware)

141 910 - 269 100$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Design Verification Engineer (Hardware): Verifying and validating complex architectural and microarchitectural IP designs to ensure high quality and reliability with an accent on functional verification and pre-silicon debugging. Focus on developing test benches using System Verilog/UVM and optimizing power and performance metrics.

Location: On-site presence required in Folsom, Santa Clara, or San Jose, California, USA

Salary: $141,910 - $269,100

Company

hirify.global's Central Engineering Group (CEG) is a data-driven organization building scalable engineering solutions across product enablement, custom ASIC, and foundry enablement.

What you will do

  • Develop and execute comprehensive IP verification plans based on microarchitecture specifications.
  • Design and maintain test benches and verification environments to maximize coverage.
  • Run system simulation models to verify IP functionality and analyze power and timing.
  • Debug and resolve pre-silicon design issues and root cause test failures.
  • Collaborate with architects and RTL developers to improve verification processes for complex designs.
  • Maintain and refine functional verification infrastructure and test framework methodologies (TFMs).

Requirements

  • Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 6+ years of experience (or 4+ with a Master's, 2+ with a PhD).
  • Proficiency in System Verilog with a strong understanding of OVM and UVM methodologies.
  • Experience in functional verification of IP designs, including root cause analysis.
  • Hands-on expertise in digital design fundamentals and hardware simulation tools.
  • Solid knowledge of microarchitecture and power/performance validation.

Nice to have

  • Knowledge of DDR/LPDDR and DFI protocol and validation.
  • Experience in DDR PHY validation.
  • Familiarity with formal verification methods.
  • Proven ability to drive technical reviews in cross-functional teams.

Culture & Benefits

  • Competitive total compensation package including pay and stock bonuses.
  • Comprehensive health, retirement, and vacation benefit programs.
  • Opportunity to work on next-generation computing systems shaping the future of technology.

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