R&D Engineer IC Design (Semiconductors)

TL;DR

R&D Engineer IC Design (Semiconductors): Implementing chips from netlist to GDSii with an accent on floorplanning, timing closure, and physical verification. Focus on PnR, IR/EM analysis, and automating physical design flows using scripting languages.

Location: Onsite in Irvine, CA, USA

Salary: $108,000 - $172,800 per year

Company

A global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Implement chips from netlist to GDSii as part of a physical design team.
• Manage floorplanning, design partitioning, and block pin assignment.
• Perform block PnR, timing closure, and physical verification.
• Execute block-level IR/EM analysis (chip-level experience is a plus).
• Develop scripts using Tcl, Perl, and Python to automate and optimize the physical design flow.

Requirements

• Bachelor's degree with 8+ years of experience or Master's degree with 6+ years of related experience.
• Strong understanding of technology elements and design flow at all stages.
• Expertise in physical verification using Mentor’s Calibre tool.
• Knowledge of low power IC design.
• Must be based in or authorized to work in the USA (Irvine, CA).

Culture & Benefits

• Comprehensive medical, dental, and vision plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP).
• Paid sick leave, vacation time, and company paid holidays.
• Employee Assistance Program (EAP).