PhD Position Next-Generation Ultra-Low Power Class-D Audio Amplifiers for Portable Devices (Analog IC Design)

TL;DR

PhD Position Next-Generation Ultra-Low Power Class-D Audio Amplifiers for Portable Devices (Analog IC Design): Researching and developing advanced Class-D audio amplifier architectures for wearables with an accent on efficiency maximization and THD+N optimization. Focus on innovating beyond PWM techniques and executing the full IC design cycle from architectural modeling to silicon measurement.

Location: Must relocate to Delft, Netherlands

Salary: €3,059 – €3,881 gross per month

Company

hirify.global is a top international university combining science, engineering, and design to address global challenges in energy, climate, mobility, health, and digital society.

What you will do

• Innovate beyond standard PWM techniques by exploring novel feedback loops, multi-level switching, or hybrid mixed-signal topologies.
• Reduce quiescent current and switching losses to extend the battery life of portable devices like Smart Glasses.
• Develop innovative linearization techniques to maintain high-fidelity audio in compact, low-voltage environments.
• Execute the full IC design cycle, from architectural modeling in MATLAB/Simulink to transistor-level design and silicon measurement.
• Work within an industry collaboration project to influence the hardware architecture of future consumer electronics.

Requirements

• Master’s degree in Electrical Engineering or Microelectronics with a focus on Integrated Circuits.
• Deep understanding of MOSFET physics, amplifiers, voltage references, and frequency compensation.
• Proven experience designing mixed-signal blocks such as ADCs, DACs, comparators, or oscillators.
• Proficiency in MATLAB/Simulink or Verilog-A for top-level architectural verification.
• Expert-level proficiency in Cadence Virtuoso (Spectre/APS) or Mentor Graphics.
• English proficiency required for scientific writing, Doctoral courses, and thesis preparation.

Nice to have

• Prior experience in Class-D amplifiers or Power Management ICs (PMIC).
• Successful tape-out experience in CMOS technologies (e.g., 180nm or 65nm).

Culture & Benefits

• 4-year employment period consisting of an initial 1.5-year contract followed by a 2.5-year contract.
• Salary increases annually from the first to the fourth year.
• 8% holiday allowance and an 8.3% end-of-year bonus.
• Customizable compensation package and discounts on health insurance.
• Relocation support via the Coming to Delft Service and a Dual Career Programme for partners.
• Flexible work schedules and access to state-of-the-art cleanrooms and measurement equipment.

Hiring process

• Submit CV, cover letter, publication list, and a presentation (<5 slides) showcasing previous work.
• Final stages include a knowledge security risk assessment based on the candidate's background.