Physical Design Engineer (AI)

TL;DR

Physical Design Engineer (AI): Deploying production-grade AI systems across the chip design lifecycle with an accent on backend implementation workflows and EDA tooling. Focus on translating frontier model capabilities into systems that accelerate innovation in semiconductor engineering.

Location: San Francisco

Salary: $162K – $302K + Equity

Company

hirify.global is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity.

What you will do

• Serve as the Physical Design SME for semiconductor customer engagements, guiding backend implementation workflows and constraints.
• Partner with Forward Deployed Engineers (FDEs) to translate customer pain points into technical plans and solution hypotheses.
• Shape AI-assisted solutions for floorplanning, place and route, clocking, timing closure, and physical verification.
• Curate evaluation datasets, golden tasks, and success metrics to ensure AI solutions reflect real-world semiconductor workflows.
• Build prototypes and benchmarks to validate opportunities and accelerate the development of AI-driven design tools.
• Mentor the broader FDE team on EDA tooling and physical design trade-offs to improve customer engagement.

Requirements

• Location: Must be based in or able to work from San Francisco
• BS with 7+ years or MS with 5+ years of experience in physical design or backend signoff for complex ASIC/SoC programs.
• Proven track record of bringing complex designs through tapeout, including PNR, CTS, and timing closure.
• Deep proficiency with industry-standard EDA tools for synthesis, STA, and physical verification.
• Strong scripting and automation skills in Python or Tcl.
• Ability to operate as a consultative expert in customer-facing and cross-functional settings.

Nice to have

• Experience applying AI/LLM systems to semiconductor workflows.
• Prior experience in solutions engineering, field engineering, or consultative technical delivery.
• Experience working across multiple semiconductor companies or different tool stacks.
• Exposure to design and verification workflows adjacent to physical design.

Culture & Benefits

• Opportunity to work at the forefront of AI research and deployment.
• Competitive compensation package including base salary and equity.
• Commitment to an equal opportunity employer environment with a focus on diverse perspectives.
• Mission-driven culture aimed at ensuring AI benefits all of humanity.