Design Engineer I (Post Silicon Electrical Validation)

TL;DR

Design Engineer I (Post Silicon Electrical Validation): Validating the electrical performance of internal silicon test chips with an accent on debugging silicon issues and producing high-quality characterization reports. Focus on collaborating with analog and digital design teams to ensure the reliability of bleeding-edge SERDES designs like PCIe Gen7 and 224Gbps Ethernet.

Location: On-site in San Jose, CA

Salary: $88,900 – $165,100

Company

hirify.global is a leader in electronics and system design, leveraging computational software, hardware, and IP to enable the creation of extraordinary electronic products across various industries.

What you will do

• Validate the electrical performance of internal silicon test chips.
• Debug silicon issues through close collaboration with analog and digital design teams.
• Generate and release high-quality characterization reports.
• Partner with cross-functional teams to ensure product functionality and reliability.
• Contribute to the development of bleeding-edge SERDES designs, including PCIe Gen7 and 224Gbps Ethernet.

Requirements

• Bachelor's or Master's degree in Electrical Engineering.
• 0-2 years of relevant work experience.
• Strong fundamentals in analog and digital electronics, negative feedback theory, stability, and control systems.
• Strong analytical and problem-solving capabilities.
• Excellent written and verbal communication skills.
• Must be able to work on-site in San Jose, CA.

Nice to have

• Prior experience within the hardware semiconductor or electronics industry.
• Experience with script-based test automation using Python, Perl, or similar tools.

Culture & Benefits

• Recognized by Fortune as one of the 100 Best Companies to Work For.
• Comprehensive medical, dental, and vision plan options.
• 401(k) plan with employer match and employee stock purchase plan.
• Paid vacation and paid holidays.
• Opportunity to work on cutting-edge technology in the IP group.