RTL Design Engineer

TL;DR

RTL Design Engineer: Develops logic design, RTL coding, and simulation for CPU cores to generate cell libraries, functional units, and CPU IP blocks for full chip integration with an accent on power, performance, area, and timing goals. Focus on defining architecture and microarchitecture features, optimizing logic for physical implementation, and ensuring design integrity.

Onsite presence required in Santa Clara, California, US

$105,650 - $200,340

Company

Silicon and Platform Engineering Group delivering breakthrough silicon and platform solutions for next-generation computing.

What you will do

• Develop logic design, RTL coding, and simulation for CPU features including cell libraries, functional units, and IP blocks.
• Define architecture and microarchitecture features of the CPU.
• Optimize RTL using strategies, tools, and methods to meet power, performance, area, timing, and integrity goals.
• Review verification plans, resolve failing RTL tests, and implement corrections.
• Document microarchitectural specifications for CPU features.
• Support SoC customers for high-quality CPU block integration.

Requirements

• Bachelor's in Electrical or Computer Engineering or STEM with 2+ years experience -OR- Master's degree
• 1+ years in basic logic design, microprocessors, computer architecture.
• Digital design and RTL coding experience.
• Verilog/SystemVerilog and/or VHDL.
• Synthesis tools like Design Compiler or Genus.
• Scripting languages: Python, Perl, TCL.

Nice to have

• Advanced verification methodologies (UVM, OVM).
• Low-power design techniques.
• Physical design constraints and timing closure.
• Version control: Git, Perforce.
• Simulation tools: ModelSim, VCS, Xcelium.

Culture & Benefits

• Competitive pay, stock bonuses, health, retirement, and vacation benefits.
• Total compensation package among the best in the industry.
• Individual pay based on location, skills, experience, and education.