Senior Staff Software/Firmware Engineer (RISC-V)

TL;DR

Senior Staff Software/Firmware Engineer (RISC-V): Leading the integration of RISC-V cores into chip validation environments and developing bare-metal firmware for PHY control with an accent on MCU subsystem architecture and system-level bring-up. Focus on building reusable firmware frameworks and transitioning to software-driven closed-loop validation.

Location: Santa Clara, CA (Onsite, required for lab environment)

Salary: $131,010 - $196,300 per annum

Company

hirify.global provides semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Lead the integration of embedded RISC-V cores into chip validation environments, defining MCU subsystem architecture and boot flows.
• Develop bare-metal and RTOS-based firmware for PHY/IP control, including calibration and tuning algorithms.
• Lead silicon and pre-silicon bring-up, debugging cross-domain issues across hardware, firmware, and PHY behavior.
• Integrate RISC-V firmware into existing PHY validation automation frameworks to enable unified validation across simulation and FPGA.
• Transition validation methodology from directed external tests to software-driven closed-loop validation.
• Collaborate with RTL, architecture, and validation teams to define scalable platform directions and interface definitions.

Requirements

• 8+ years of experience in embedded systems, firmware, or SoC development.
• Strong proficiency in C/C++ with bare-metal programming experience.
• Experience with boot flows, startup code, linker scripts, and memory-mapped I/O.
• Hands-on experience debugging HW/SW integration issues in silicon, FPGA, or RTL simulation.
• Solid understanding of computer architecture fundamentals, including CPU, memory hierarchy, and buses.
• Must be eligible to access export-controlled information as defined under U.S. law.

Nice to have

• Experience with RISC-V systems or ARM Cortex-M architectures.
• Familiarity with PLIC and CLINT interrupt systems.
• Experience with PHY/SerDes high-speed IP bring-up or validation.
• Proficiency with RTOS such as FreeRTOS or Zephyr.
• Exposure to hardware verification environments like UVM.

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Comprehensive family support programs to balance work and home life.
• Robust mental and physical health resources.
• Recognition and service awards for key contributions and milestones.