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1 день назад

Senior ASIC Design Engineer (AI)

Формат работы
remote (только USA)
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior ASIC Design Engineer (AI/Networking): Developing high-performance SoCs for AI and HPC interconnect solutions with an accent on RTL implementation and high-speed data paths. Focus on optimizing timing closure, implementing packet processing logic, and supporting post-silicon validation for world-class networking hardware.

Location: Remote (Must be based in the United States)

Company

hirify.global delivers high-performance scale-out networking solutions for AI and HPC datacenters.

What you will do

  • Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic.
  • Collaborate with verification engineers to create block- and system-level test plans to ensure design coverage.
  • Define timing constraints for RTL blocks and collaborate with Physical Design engineers to optimize timing closure.
  • Support post-silicon validation and debug ASIC issues in coordination with hardware, firmware, and software teams.
  • Contribute to performance optimization and power-aware design strategies for Host Fabric Interface subsystems.

Requirements

  • B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field.
  • 8+ years of post-college experience in digital design with proficiency in Verilog and System Verilog.
  • Proven experience in RTL design for high-speed data paths or packet processing in ASICs.
  • Deep understanding of Host Ethernet adaptor architectures.
  • Must be residing within the United States.
  • Strong verbal and written communication skills.

Nice to have

  • Knowledge of Ethernet architecture and networking protocols (TCP/IP, RDMA/RoCE, IPSec).
  • Expertise in multiple clock domain designs and asynchronous interfaces.
  • 5+ years of experience with scripting languages such as TCL, Python, or Perl.
  • Familiarity with EDA tools like Design Compiler, Spyglass, or PrimeTime.

Culture & Benefits

  • Competitive compensation package including equity, cash, and performance-based annual bonuses.
  • Comprehensive health, dental, and vision coverage, plus life and disability insurance.
  • 401(k) plan with company match.
  • Open Time Off (OTO) for regular full-time exempt employees.
  • Dynamic and flexible work environment collaborating with industry leaders in semiconductors.

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