Senior CPU Core Physical Design Engineer (VLSI)

TL;DR

Senior CPU Core Physical Design Engineer (VLSI): Implementing custom CPU designs from RTL to GDS for next-generation processors powering the AI revolution with an accent on synthesis, place and route, and timing closure. Focus on optimizing power, frequency, and area while ensuring reliability and power integrity.

Location: Hybrid in Folsom, California, US

Salary: $141,910 - $269,100

Company

Global leader in semiconductor manufacturing and innovation shaping the future of computing and AI.

What you will do

• Execute physical design implementation from RTL to GDS to create manufacturing-ready design databases.
• Manage all aspects of the flow, including synthesis, place and route, clock tree synthesis, and floor planning.
• Perform verification and sign-off, including static timing analysis (STA), power integrity, and layout verification.
• Collaborate with logic, circuit, and architecture teams to improve CPU microarchitectures.
• Partner with EDA vendors to enhance tool capabilities for high-speed, low-power synthesizable CPUs.
• Optimize design parameters specifically for power, frequency, and area.

Requirements

• Bachelor's degree in Computer Engineering, CS, Electrical Engineering or STEM with 6+ years of experience (or Master's with 4+ years).
• 4+ years of experience in VLSI circuit design and synthesis.
• 4+ years of experience in Static Timing Analysis (STA).
• 4+ years of experience in Low power design.
• Must be authorized to work in the United States.

Nice to have

• Experience with x86 CPU architecture.
• Proficiency in Tcl, Perl, or Python programming.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to contribute to foundational technology for the AI revolution.