Principal Timing Engineer (ASIC)

TL;DR

Principal Timing Engineer (ASIC): Leading the post-RTL design flow, including synthesis, timing closure, and DFT generation for high-speed SerDes PHY solutions with an accent on timing analysis and physical design. Focus on delivering competitive SerDes IP solutions for data rates up to 224Gbps and optimizing design methodology.

Location: Toronto, Canada

Salary: 145,800 - 194,400 CAD per annum

Company

hirify.global provides semiconductor solutions that serve as essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

• Manage block and chip level synthesis, timing closure, and DFT generation.
• Improve design methodology and flow for SerDes IPs ranging from 10Gbps to 224Gbps.
• Collaborate with Analog/Digital design teams to deliver competitive SerDes IP solutions.
• Provide pre- and post-silicon support to product teams.

Requirements

• Bachelor's degree (12+ years exp) or Master's/PhD (10+ years exp) in Electrical Engineering, Computer Science or related fields.
• Proficiency in logic/physical synthesis using Synopsys or Cadence tools.
• Expertise in static timing analysis using Primetime.
• Experience in physical design for 28nm and beyond, including DFT generation and verification.
• Strong scripting skills in Perl and Tcl.
• Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Nice to have

• Low power design and IR drop analysis.
• Circuit level or custom design experience.
• Floorplanning, clock-tree synthesis, and power planning/analysis.
• Signal integrity and physical verification.
• PnR flow development.

Culture & Benefits

• Environment of shared collaboration, transparency, and inclusivity.
• Competitive compensation and comprehensive benefits.
• Dedicated tools and resources for professional growth and development.

Hiring process

• Interviews strictly prohibit the use of AI tools (transcription apps, ChatGPT, Copilot, etc.); use of such tools will result in disqualification.