Principal DFT Engineer (Semiconductors)

TL;DR

Principal DFT Engineer (Semiconductors): Participating in chip-level DFT architecture definition and implementing basic DFT schemes with an accent on scan, boundary scan, and BIST. Focus on verifying DFT logics via simulation, performing static timing analysis, and debugging DFT patterns on ATE.

Location: Working location is in Shanghai, China

Company

hirify.global is a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Participate in the definition of chip-level DFT architecture.
• Implement basic DFT schemes, including scan, boundary scan, Mem BIST, and Logic BIST.
• Verify all DFT logics and test patterns through simulation.
• Conduct static timing analysis for test modes.
• Participate in ATE bring-up and debug DFT patterns on ATE.

Requirements

• Bachelor's degree in Electrical, Electronic, or Computer Engineering with 16+ years of relevant industry experience.
• Alternatively, a Master's degree in Electrical, Electronic, or Computer Engineering with 14+ years of relevant industry experience.
• Must be based in or able to work in Shanghai, China.