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4 дня назад

Lead Design Engineer (Virtual Solution) (Emulation)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
c1
Страна
China
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Lead Design Engineer (Virtual Solution) (Emulation): Designing and developing system-level AVIP solutions for emulation and prototyping platforms with an accent on high-speed protocols and SoC validation. Focus on building end-to-end verification flows, optimizing system performance, and developing custom automation tools for complex hardware environments.

Location: Shanghai

Company

hirify.global is a global leader in electronic design automation (EDA) software and hardware tools for the semiconductor and electronics industry.

What you will do

  • Design and develop system-level AVIP solutions for Palladium and Protium emulation/prototyping platforms.
  • Build and integrate Accelerated Verification IP (AVIP) environments for complex SoC and subsystem validation.
  • Develop end-to-end verification flows, including testbench modeling and bare-metal/driver-level validation.
  • Optimize solutions for performance, scalability, and emulation efficiency.
  • Create custom test cases and automation tools for embedded, co-emulation, and hybrid flows.
  • Collaborate with cross-functional teams and customers to debug system-level issues and support deployment.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • At least 3 years of professional experience in hardware design or verification.
  • Strong expertise in high-speed protocols such as PCIe, CXL, AMBA, UCIe, or Ethernet.
  • Proficiency in RTL design using SystemVerilog or Verilog.
  • C/C++ development experience for modeling and system integration.
  • English: C1+ (excellent verbal and written communication) required.

Nice to have

  • Experience with AVIP solutions and end-to-end system validation (simulation to prototyping).
  • Knowledge of UVM, Qemu, Gem5, or other system emulation projects.
  • Experience with multi-language environments including SystemVerilog, C/C++, and Python.
  • Exposure to AI/ML techniques applied to verification or tooling.

Culture & Benefits

  • Opportunity to work as a leader and innovator on high-impact technology.
  • Environment focused on solving the most complex challenges in the industry.
  • Collaborative culture with exposure to global teams.

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