Failure Analysis Engineer (Power Semiconductors)

Location: San Jose, California, United States

Annual base pay: $76,854–$121,153

Company

hirify.global develops power semiconductor products and supports product quality through device-level failure analysis.

What you will do

• Perform device-level fault isolation and defect analysis on power ICs for RMA cases, customer issues, power supply applications, and production testing.
• Identify root causes of product failures using electrical, physical, and microscopic analysis techniques.
• Prepare clear and technically rigorous investigation reports for external customers.
• Recommend corrective actions to internal and external customers based on analysis results.
• Communicate findings to support improvements in product design, process technology, and applications.

Requirements

• At least 2 years of relevant experience.
• Bachelor's degree in Electronic Engineering or an equivalent discipline; an MSEE is preferred.
• In-depth knowledge of digital and analog circuits, device physics, and IC fabrication processes.
• Ability to interpret IC ATE test logs, system-level and IC-level schematics, and CMOS and bipolar IC layouts.
• Hands-on experience with ATE, curve tracing, nano/micro-probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, X-ray, FIB, SEM/EDX, cross-sectioning, and deprocessing techniques.
• Strong technical writing and verbal communication skills.

Nice to have

• Understanding of analog, mixed-signal, or power semiconductor operating characteristics.
• Experience applying fault isolation techniques at chip level and PCB power supply system level.
• MSEE degree.

Culture & Benefits

• Equity and medical benefits for eligible employees.
• Employee Stock Purchase Plan and 401(k).
• Tuition reimbursement.
• Time-off programs.