RTL Design Engineer

TL;DR

RTL Design Engineer: Develops logic design, RTL coding, and simulation for CPU IP blocks required for full chip integration with an accent on power, performance, area, timing goals, and design integrity. Focus on defining architecture and microarchitecture features, optimizing logic, reviewing verification plans, and supporting SoC integration.

Location: On-site presence required in US: Texas (Austin), Arizona (Phoenix), Oregon (Hillsboro)

Salary: $105,650 - $200,340

Company

Silicon and Platform Engineering Group delivering breakthrough silicon and platform solutions.

What you will do

• Develop logic design, RTL coding, and simulation for CPU cell libraries, functional units, and IP blocks.
• Define architecture and microarchitecture features of the CPU.
• Optimize RTL logic using strategies and tools to meet power, performance, area, timing, and physical implementation goals.
• Review verification plans, resolve failing RTL tests, and ensure design correctness.
• Document microarchitectural specs for CPU features.
• Support SoC customers for high-quality CPU block integration.

Requirements

• Bachelor’s Degree in Electrical or Computer Engineering or STEM with 2+ years experience OR Master’s Degree
• 1+ years in: Basic Logic Design, Microprocessors, Computer Architecture, Digital design and RTL coding
• Verilog/SystemVerilog and/or VHDL
• Synthesis tools (Design Compiler, Genus)
• Scripting languages (Python, Perl, TCL)

Nice to have

• Experience with advanced verification methodologies (UVM, OVM)
• Knowledge of low-power design techniques
• Understanding of physical design constraints and timing closure
• Experience with version control systems (Git, Perforce)
• Experience with simulation tools (ModelSim, VCS, Xcelium)

Culture & Benefits

• Competitive pay, stock bonuses, health, retirement, and vacation benefits.
• Total compensation package among the best in the industry.
• Shift 1 (United States of America).