Senior CPU Power Delivery Engineer

TL;DR

Senior CPU Power Delivery Engineer: Enabling complete power delivery solution and reliability convergence for next generation CPU cores with an accent on PDN design, IR/EM metrics, and power gating. Focus on performing feasibility studies, defining bump patterns and on-die grids, and collaborating with cross-functional teams to meet high-performance low-power specifications.

Location: US, Texas, Austin (primary) or Oregon, Hillsboro. Hybrid work model splitting time on-site at hirify.global sites and off-site.

Salary: $164,470–$232,190

Company

Silicon and Platform Engineering Group delivering breakthrough silicon and platform solutions for next-generation computing.

What you will do

• Perform feasibility studies, design, verification, and simulation of power distribution network (PDN) and sign off IR/EM metrics.
• Work with power management architects and layout team to define and implement power gating solutions.
• Collaborate with RTL, SD, and Circuit teams to converge design on all PDN metrics.
• Define bump patterns and on-die power grid.
• Work with package integration team to ensure complete IP system meets specifications.
• Triage, debug, and fix power distribution network issues with post-Silicon debug team.

Requirements

• Bachelor's in Electrical/Computer Engineering or related with 10+ years experience; Master's with 7+; PhD with 3+.
• Experience in Physical Design, SoC Design, or CPU Design.
• VLSI experience.
• Power Delivery design, implementation, and validation for high-performance low-power designs.
• Mentor Graphics RedHawk or equivalent for EM and IR drop analysis.

Nice to have

• Circuit design trade-offs for power, performance, and area.
• Low power implementation techniques.
• TCL/Python coding.

Culture & Benefits

• Competitive total compensation including pay, stock bonuses, health, retirement, and vacation benefits.
• Hybrid work model eligible.
• Investment in employee development through every life stage.