ASIC Analog Layout Engineer (BCD)

TL;DR

ASIC Analog Layout Engineer (BCD): Driving the top-level integration and layout development of analog and mixed-signal ICs with an accent on DRC-compliant designs and optimal area utilization. Focus on defining floorplans, performing parasitic extraction, and coordinating tape-out activities for mobility-related semiconductors.

Company

hirify.global develops and produces hardware, software, and services for the future of mobility, utilizing a fabless semiconductor model through its AESS organization.

What you will do

• Drive top-level layout integration for analog and mixed-signal chips.
• Define floorplans, padframe designs, and bonding diagrams in coordination with other domains.
• Generate and integrate analog layouts at both block and chip levels.
• Perform pin placement, parasitic extraction, and layout optimization.
• Ensure compliance with DRC and LVS and support tape-out activities.
• Collaborate with design engineers to meet speed, area, power, DFM, ESD, and EMC requirements.

Requirements

• Academic degree in Electronics Engineering or a related field.
• Extensive professional experience in analog layout design and top-level integration.
• Strong expertise in BCD technologies (65nm to 180nm).
• Deep understanding of deep submicron effects, including parasitics, coupling, and matching.
• Proficiency in layout tools for design, DRC, LVS, and extraction.
• Fluent English language skills (both written and spoken).

Nice to have

• Knowledge of analog circuit design.
• German language skills.

Culture & Benefits

• Winning culture driven by bold ideas and personal ownership.
• Focus on career growth, skill development, and professional impact.
• Opportunity to shape the future of mobility.
• Inclusive environment welcoming applications from severely handicapped individuals.