CPU Physical Design Engineer (Silicon)

TL;DR

CPU Physical Design Engineer (Silicon): Implementing custom CPU designs from RTL to GDS for high-performance microprocessors with an accent on power efficiency, frequency, and area optimization. Focus on executing full physical design flows, including synthesis, floor planning, and static timing analysis to deliver industry-leading performance-per-watt solutions.

Location: Hybrid (Austin, Texas, US)

Salary: $122,440 - $232,190

Company

Global leader in semiconductor design and manufacturing, shaping the future of high-performance computing.

What you will do

• Perform physical design implementation of custom CPU designs from RTL to GDS.
• Conduct verification and signoff processes, including formal equivalence, static timing analysis (STA), and physical verification (DRC/LVS).
• Execute the full CPU physical design flow, including synthesis, floor planning, place and route, and clock tree synthesis.
• Optimize CPU designs to improve power efficiency, frequency, and area.
• Collaborate with logic, circuit, and architecture teams to enhance CPU microarchitectures.
• Develop scripts to automate design implementation, verification, and quality analysis.

Requirements

• Bachelor's degree in Computer or Electrical Engineering with 4+ years of experience, or Master's with 3+ years, or PhD.
• 3+ years of experience with physical design tools such as Synopsys Fusion Compiler or Cadence Genus/Innovus.
• 2+ years of experience with formal equivalence verification tools and methods.
• 4+ years of hands-on experience with TCL, Perl, or Python scripting and source code management.
• 2+ years of experience with static timing analysis tools like PrimeTime for timing closure.
• Must be based in the US (Austin, Texas) for a hybrid work model.

Nice to have

• Expertise in chip-level physical design verification and timing closure for worst-case corners.
• Experience with multiple-power plane design methodologies (MPP/UPF).
• Familiarity with machine learning for design optimization and leveraging AI co-pilots for development.
• Knowledge of DRC/LVS and noise analysis using Caliber or Redhawk.

Culture & Benefits

• Comprehensive total rewards package including competitive pay and stock bonuses.
• Generous health, retirement, and vacation benefit programs.
• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to work on cutting-edge microprocessor technology within a diverse, global team.