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Описание вакансии
Текст:
TL;DR
RISC-V AI / HPC & Agentic Software Engineer (RISC-V, AI/HPC): Enabling AI, HPC, and agentic software stacks on RISC-V processors with an accent on runtime orchestration, distributed execution, memory systems, and low-level optimization. Focus on integrating LLK infrastructure, optimizing performance-critical code, and aligning software capabilities with CPU architecture and custom ISA extensions.
Location: Remote, based out of Taiwan
Company
Tenstorrent develops next-generation RISC-V CPUs and AI platforms for high-performance computing and autonomous AI systems.
What you will do
- Enable AI, HPC, and agentic AI software stacks on Tenstorrent’s RISC-V processors.
- Integrate and optimize LLK infrastructure for CPU execution.
- Lead the bring-up of a RISC-V-native agentic AI software stack.
- Develop runtime orchestration, distributed execution frameworks, memory systems, and developer tools.
- Collaborate with CPU architects, microarchitecture teams, compiler engineers, and AI kernel developers.
- Translate performance targets into architectural and software requirements.
Requirements
- Strong background in HPC and AI software development.
- Solid understanding of RISC-V architecture, including ISA, extensions, and microarchitectural implications.
- Proficiency in C/C++ and systems programming.
- Experience optimizing performance-critical code paths, profiling, and low-level systems.
- Experience with agentic AI frameworks, distributed execution systems, or orchestration platforms.
- Familiarity with LLVM, GCC, vectorization, custom ISA extensions, or accelerator integration.
Nice to have
- Experience with hardware–software co-design and scalable AI infrastructure.
- Experience with distributed AI systems and agentic AI architectures.
Culture & Benefits
- Competitive compensation package and benefits.
- Collaborative, curious environment focused on solving complex technical problems.
- Opportunity to work across hardware, compilers, runtimes, and AI infrastructure.
- Learning opportunities in RISC-V microarchitecture, custom ISA design, and end-to-end AI stack integration.
- Equal opportunity employment.
Hiring process
- Experience levels will be assessed during the interview process.
- The offer level will align with the assessment and may differ from the level stated in the posting.
- Employment is contingent on eligibility to access U.S. export-controlled technology.
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