Lead Design Engineer (Analog AMS)

TL;DR

Lead Design Engineer (Analog AMS): Contribute to analog and AMS design activities for high-speed memory interface PHYs with an accent on architecture models, feasibility studies, and silicon bring-up. Focus on evaluating performance trade-offs, providing circuit-level insights, lab debug, root-cause analysis, and applying AI-based approaches to automate tasks.

Location: San Jose

Salary: $114,800 to $213,200 (California)

Company

hirify.global hires and develops leaders and innovators impacting the world of technology.

What you will do

• Contribute to analog and AMS design for high-speed memory interface PHYs with hands-on execution.
• Evaluate architecture models and feasibility studies for performance, power, area, and scalability.
• Support early architecture exploration with circuit-level insights and validation.
• Handle silicon bring-up, lab debug, characterization, and root-cause analysis of issues.
• Jump into technical domains to unblock teams or customers during critical phases.
• Contribute to technical documentation and apply AI to enhance productivity.

Requirements

• M.S. degree in Electrical Engineering, Computer Engineering, or related field
• Minimum 7 years of industry experience in analog/AMS design, memory PHYs, or high-speed IO
• Strong hands-on experience with analog and AMS circuits
• Solid background in DDR/LPDDR memory interfaces

Culture & Benefits

• Paid vacation and paid holidays
• 401(k) plan with employer match
• Employee stock purchase plan
• Variety of medical, dental, and vision plan options
• Potential incentive compensation: bonus, equity