Post-silicon Validation and Debug Engineer

TL;DR

Post-silicon Validation and Debug Engineer (SoC): Perform low-level and complex debug across SoC systems and subsystems with an accent on failure isolation, root cause analysis, and validation plan execution. Focus on developing debug techniques, utilizing DFD tools, and collaborating with design and validation teams to characterize new features.

Location: Onsite in US, Oregon, Hillsboro (primary) or California, Folsom

Salary: $105,650 - $149,150

Company

Silicon and Platform Engineering Group delivering breakthrough silicon and platform solutions for next-generation computing.

What you will do

• Perform low-level and complex debug across multiple systems, subsystems, or SoC levels for hirify.global products.
• Develop validation plans and execute tests for domain- and system-level features/flows.
• Develop techniques for faster SoC and platform-level debug while isolating failing components.
• Utilize DFD tools and scripts to improve debug processes.
• Conduct root cause analysis, resolve triage failures, and track debug progress.
• Collaborate with design, validation teams, and manufacturing to characterize new device features.

Requirements

• Bachelor's in Electrical Engineering, Computer Engineering, or related field
• 0-1+ years experience with Bachelor's or 0 years with Master's in SoC design and debug
• Proficiency in SoC design, architecture, and debug techniques including DFD tools
• Strong understanding of firmware and software integration in hardware systems
• Ability to apply debug workflows using advanced test methodologies and failure isolation

Nice to have

• Master's degree in Electrical Engineering, Computer Engineering, or related
• Experience collaborating across design and validation teams
• Familiarity with Graphics and Power Management flows in SoC

Culture & Benefits

• Competitive pay, stock bonuses, health, retirement, and vacation benefits
• Shift 1 (United States of America)
• College Grad position
• On-site work model